What is power dissipation in CMOS

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10.2.1 Dynamic power dissipation

The output of the inverter is loaded with further inputs. With CMOS logic, these inputs do not consume any noteworthy quiescent current, but they form a capacity that is reloaded with every switching process.

As dynamic power dissipation is the term used to describe the power that is consumed during the switching operations of the inverter stage. The mean switching frequency an inverter stage is defined as the number of double switching operations (up and down switching operations) per unit of time.

The dynamic power loss results from


in which is the energy that is necessary for a double switching process.

In typical switching processes, which are characterized by a rapid change in the input level, the cross-current that flows through both transistors during the switching process can be neglected compared to the output current of the inverter stage and the switching energy obtained is:


in which represents a nominal capacity of the load.

If the input signal has very flat edges, this component is also due to the cross current that flows through the inverter during the longer switching process. This increases the switching energy .

Martin Stiftinger
Fri Oct 21 18:22:52 MET 1994